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I don’t usually discuss PC, workstation, and server processors because I’m all about embedded processors these days. But Intel’s photo of the first Core i7 processor stopped me and I thought I’d write something. Here’s the photo:
The image shows four x86 processor cores arrayed across the top. Each core runs at 2.66 GHz (faster cores that exceed 3 GHz will appear in the future). Each of the four on-chip processor cores has its own 64-Kbyte L1 and 256-Kbyte L2 caches. The four on-chip processor cores share an on-chip, 8-Mbyte L3 cache and, of course, main memory external to the chip. An integrated, high-speed DDR3 memory controller links that off-chip main memory to the processor chip. In all, this is a very powerful machine.
Unfortunately, I get the impression from my many conversations with embedded systems designers that a lot of embedded designers think this is the right way to architect embedded systems. When they see three levels of on-chip cache used for this class of processor, they start to believe that all processors need caches—that cache memories are just part of the game now. What they forget or ignore is that processors in the same league with Intel’s Core i7 chip cost hundreds of dollars and dissipate many tens of Watts. This is a great league, but it’s not the embedded league.